1. Field
Various different embodiments relate to processor caches. In particular, various different embodiments relate to error correction code logic for processor caches that uses a common set of check bits, to processors having such logic, to methods performed by such processors, or to systems having such processors.
2. Background Information
Processors typically have one or more caches. The caches may represent relatively small and fast types of memories that are closer to a core or cores of the processor than main memory, and that may be used to store data from frequently used memory locations. When the processor wants to read data from or write data to a location in the main memory, it may first check to see if a copy of the data is located in the cache. If the data is found to be located in the cache, then the processor may quickly access the data in the cache. This is relatively faster or has lower latency than accessing the main memory. As a result, accesses to the cache help to reduce the average time or latency of accessing the data, which may help to improve processor performance.
Processors often provide caches at more than one level. The levels differ in their relative closeness to one or more cores of the processor. For example, a first level of cache (e.g., a level 1 or L1 cache) may be closest to a given core, a second level of cache (e.g., a level 2 or L2 cache) may be next closest to the core, and a third level of cache (e.g., a level 3 or L3 cache) may be the next closest to the core, and so on. Caches closer to the core generally tend to be smaller than caches farther from the core. In addition, in processors with multiple cores, the caches may either be dedicated to a given core, or shared by multiple cores. For example, a multi-core processor may have a plurality of first level caches that are each dedicated to a different core, and shared second level cache that is shared by each of the different cores. Furthermore, caches may be either monolithically integrated on-die with a core, or off-die (e.g., attached to a motherboard). Commonly, the caches at levels relatively closer to the core are monolithically integrated on-die, whereas the caches at levels farther from the core may either be on-die or off-die.
The caches of processors are often protected by error correcting codes (ECCs). In addition, different caches may be protected by different ECC schemes, such as schemes providing relatively more or less error correction.